The present invention relates to a semiconductor device, and more particularly to a semiconductor memory device with a mirror function and a module mounting thereof.
In general, a dynamic random access memory or DRAM is typically manufactured in a module as a so-called Double In-line Memory Module (DIMM) or a module with a shape where DRAM device is mounted on both sides of a substrate.
DIMM modules mounted with DRAM on both sides of a substrate generally have DRAMs that both use the same signal lines, such as the address and control lines in common with each other. The pin (pad) to which commonly used signals (for being used in common by DRAM packages on both sides of the substrate) should be arranged so that they are symmetrical to each other at a package level. For such an arrangement relation, a mirror function is provided in the DRAM.
For example, it is proposed that a column address strobe signal /CAS and a chip selection signal /CS are input through two pads symmetrical to each other, and the conventional mirror function corresponding to this case will be described with reference to FIG. 1.
A mirror signal MF, determines whether a mirror function is on or off a transmission path of the column address strobe signal /CAS and the chip selection chip /CS output from the respective buffers 10 and 20 is also selected. The respective selectors 30 and 40 transfer signals to mirror function “on” paths MF_ON0 and MF_ON1 or mirror function “off” path “off” paths MF_OFF0 and MF_OFF1 by means of the mirror signal MF.
In other words, when the mirror function is active, any one of two memory chips attached to both sides of the substrate transfers the column address strobe signal /CAS and the chip selection signal ICS to the mirror function “off” path “off” paths MF_OFF0 and MF_OFF1, respectively, and the other transfers the chip selection signal /CS and the column address strobe signal /CAS and to the mirror function “on” paths MF_ON0 and MF_ON1, respectively.
The column address strobe signal /CAS and the chip selection signal /CS input through the respective pads should be transferred up to a transfer position, having the same delay time at the time of “on” function and the “off” mirror function. When the same delay time is applied to the two signals, no skew is generated as compared to external signals.
In laying out a semiconductor memory device, it is difficult to lay out the lines corresponding to the mirror function “off” paths MF_OFF0 and MF_OFF1 and the mirror function “on” paths MF_ON0 and MF_ON1 to have the same electrical length with each other.
Although the mirror function “off” paths MF_OFF0 and MF_OFF1 and the mirror function “on” paths MF_ON0 and MF_ON1 are laid-out so that they have the same physical length, a signal propagation delay difference nevertheless occurs between the signals applied to the mirror function “on” paths and the mirror function “off” paths because of parasitic capacitor or parasitic resistance so that the skew or propagation delay differences can occur due to the delay difference.
The resulting skew generates the difference between a setup/hold time forming a window of the signal, thereby deteriorating the setup/hold performance of the signal.